Glossary
ACTIVE CIRCUIT AREA - All areas from outside edge of the bond pads inward, except where there is an active line in the device located beyond the outside edge of the bond pads.
AIR (COUPLING) BRIDGE - A raised layer of metallization used for interconnection that is isolated from the die surface by only air.
BALL BONDING - A thermocompression bonding technique. The wire end is melted to form a ball, which provides a larger area of contact than otherwise possible.
BALL GRID ARRAY (BGA) - A packaging technology similar to a pad grid array, in which a device's external connections are arranged as an array of conducting pads on the base of the package. However, in the case of a ball grid array, small balls of solder are attached to the conducting pads.
BARE DIE - An unpackaged discrete or integrated circuit. Bare die have bond pads on the upper surface suitable for interconnection to the substrate or package by wire bonding or soldered wiring.
BONDING, DIE - Attaching of a semiconductor die to the package or substrate. Also called die attachment.
BONDING WIRE - Fine wire used for making electrical interconnection between various bonding pads to device terminal.
CHIP - See DIE
CHIP ON BOARD - Technology where bare die are bonded to boards/substrates and wire bond connections are made from board to die.
CLEAN ROOM - An area in which a high degree of cleanliness is achieved and maintained by controlling the generation and distribution of particulate matter inside the room. Cleanliness is achieved by air filtering and/or dilution systems in a controlled environment.
CONDUCTIVE ADHESIVE : An adhesive material (usually epoxy) that has metal powder (usually silver) added to increase electrical conductivity
DIE - A single square or rectangular piece of semiconductor material into which a specific electrical circuit has been fabricated.
DIE ATTACH - Bonding of die to a substrate or package.
DIE PRODUCTS - Includes IC devices that are sold on the open market in bare die, flip chip or wafer level chip scale package formats.
DIE-SHEAR TEST - A test to determine the shear strength of the bond between a die and the base it is bonded to.
DIELECTRIC ISOLATION - Electrical isolation of one or more elements of an integrated circuit by surrounding the elements with an isolating barrier such as semiconductor oxide.
DIFFUSION - Electrical isolation of one or more active circuits.
DIRECT CHIP ATTACH (DCA) - A name applied to any of the chip-to-substrate connections used to eliminate the first level of packaging: see also Chip-on-Board.
DOWN BONDING -A wire bond operation carried out from a higher to a lower level or plane.
ENCAPSULATE - Sealing or covering of a microcircuit to provide mechanical and environmental protection.
FLIP-CHIP - An integrated circuit which is designed to electrically and mechanically interconnect by means of an appropriate number of bumps and is intended for facedown mounting.
FOREIGN MATERIAL - Any material that is foreign to the microcircuit or package, or any non-foreign material that is displaced from its original or intended position within the microcircuit package.
FUNCTIONAL CIRCUIT ELEMENTS - Diodes, transistors, crossunders, capacitors, and resistors.
GALLIUM ARSENIDE (GaAs) - Microelectronics wafer material typically used for high-speed circuit designs.
GLASSIVATION - Top layer of transparent insulating material that covers active area except for bond pads.
HERMETIC SEAL - A gas tight seal.
HYBRID CIRCUIT - A component containing one or more bare die and at least two circuit elements.
INTEGRATED CIRCUIT (IC) - An electronic circuit in which many active or passive elements are fabricated and connected together on a single substrate, as opposed to discrete devices such as transistors, resistors, capacitors, and diodes.
INSULATOR - A material that is a poor conductor of electricity or heat, and used to separate conductors from one another.
INTERCONNECTION - The conductive path required to achieve electrical connection from a circuit element to the rest of the circuit.
KERF - That portion of the component area from which material has been removed or modified by trimming or dicing.
KNOWN GOOD DIE - A qualification or a process that indicates that a semiconductor die has been tested to a specified or determined level of quality or "goodness".
LEAD FRAME - A metallic frame containing leads and a base to which an unpackaged integrated circuit is attached. After encapsulation, the outer part of the frame is cut away and the leads are bent into the required shapes.
LINE OF SEPARATION - Visible distance or space between two features that are observed not to touch at the magnification in use.
MIL - One-thousandth of an inch (x 10 -3 inches). Equal to 25.4 microns.
METALLIZATION - One or more layers of microcircuit metal conduction paths.
MULTILEVEL METALLIZATION - Two or more levels of metal or any other material used for interconnections that are isolated from each other by insulating material.
MICROBOND - A bond of a small wire to a conductor or chip device.
MICROCIRCUIT - A section of semiconductor wafer with circuitry and components etched into the top. Also called a die or chip.
MICRON (um) - A unit of length equal to one millionth of a meter.
MULTICHIP MODULE (MCM) - A hybrid which contain at least two bare die.
NECKDOWN - The narrowing of leads or wire.
ORIGINAL WIDTH -The width dimensions or distances that is intended by design.
OXIDE LAYER - A layer of an integrated circuit created to provide isolation between conductive layers.
PACKAGE - An enclosure for a single element, an integrated circuit, or a hybrid circuit. It provides hermetic or non-hermetic protection, determines the form factor, and serves as the first level interconnection externally for the device by means of package terminals. A package generally consists of a bottom part, called the case or header, and a top part, called the cover or lid. These are sealed into one unit.
PACKAGE POST - A generic term used to describe the bonding location on the inside of the package.
PASSIVATION - Insulating layer directly over a circuit or circuit element to protect the surface from contaminants, moisture, or particles.
PEG BONDING - A thermocompression bonding technique. The wire end is compressed into the pad or conductor area.
RETICLE - A uniform pattern of die on the same wafer.
SCRIBE STREET - The lines that separate the die from each other on a wafer where dicing occurs.
SEALING - Joining the package case header or substrate to its cover or lid.
SILICON CHIP - Although a variety of semiconductor materials are available, the most commonly used is silicon and integrated circuits are popularly known as silicon chips, or simply chips.
SLURRY - A thick mixture of water and fine wafer particles produced during the wafer sawing process. If wafer is not cleaned properly, slurry can be seen as a very fine particle deposit over the surface of individual die, sometimes forming patterns from the spray of the mixture.
SUBSTRATE - The base material upon which the passivation, metallization and circuit elements are added to built a device.
TAIL, WIRE - The free end of wire extending beyond the bond impression.
UP-BONDING - A wire bonding operation carried out from the die up to the package post.
VIA - A small hole formed through the wafer or Printed Circuit Board and metallized, causing electrical connection to be made from the front (the side on which the circuitry is formed) to the backside of the wafer, substrate, or Printed Circuit Board.
VISIBLE LINE OF SEPARATION - Is understood to be separation between two elements that is clearly visible at 100x magnification.
VOID - Any region where bare semiconductor material or passivation is visible within the design areas of the metallization.
WAFER - A disk of semiconductor material that forms the base on which a number of integrated circuits are built. Typical 4, 6, 8, or 12 inches in diameter and between .010" and .030" thick