The Die Products Consortium (DPC) is a group of leading microelectronic companies collaborating to expand the market for semiconductor die products, with a focus on:
- bare and bumped die
- known-good die (KGD) processes
- chip-on-board (COB) and flip-chip
- stacked (3D) system-in-package (SiP)
- wafer-level chip-scale packaging (WL-CSP)
Ongoing DPC projects promote improved quality, reliability, handling, shipping, and associated infrastructure for semiconductor die products.
The DPC is open to new members. Find out how to join.
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Industry Leaders Seeking Adaptive Test Solutions
A subgroup of members of the Die Products Consortium, the AC Defects test team, is focused on a new generation of test and reliability methods for leading edge semiconductor devices known as Adaptive Test. The group sponsored a unique meeting with third party vendors of Adaptive Test solutions in Sa...
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Stacked System-in-Package (SiP) Assembly
Stacked, or three-dimensional (3D), multichip packaging methodologies have recently become mainstream, high-volume techniques of choice in helping system designers restrain the size, weight, power consumption, and cost of small, portable, and wireless consumer devices. This tutorial reviews stacked system-in-package enabling technologies
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LSI Corporation is a leading provider of innovative silicon, systems and software technologies that enable products which seamlessly bring people, information and digital content together. We offer a ...
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